The present invention relates to a phase change memory device and a method for manufacturing the same, and more particularly, to a phase change memory device which can increase a junction area between an N-type area and a P-type area when forming PN diodes as cell switching elements and a method for manufacturing the same.
In general, memory devices are largely divided into two groups. The volatile RAMs (random access memory) end up losing their inputted information when the power is interrupted. In contrast, non-volatile ROMs (read-only memory) can continuously maintain their stored state of inputted information even when power is interrupted. As among volatile RAMs, the DRAM (dynamic RAM) and the SRAM (static RAM) are well known examples. As among the non-volatile ROMs, flash memory devices such as an EEPROM (electrically erasable and programmable ROM) are well known examples.
Even though DRAMs belong to group of excellent memory devices, DRAMs require a relatively high charge storing capacity. To this end, since the surface area of an electrode must be increased, it is difficult if not impossible to accomplish a high level of integration of DRAMs. Further, with regards to flash memory devices, because these devices comprise two stacked gates, a high operation voltage is required and often times a separate booster circuit is needed to generate the necessary operation voltage for writing and deletion operations. Likewise, flash memory devices also suffer from being difficult if not impossible to accomplish a high level of integration.
With this in mind, it is not surprising that research and development efforts have continued to be pursued in the hopes of eventually uncovering an alternate novel memory device which has the features having a simple configuration and being capable of accomplishing a high level of integration while retaining many of the desirable characteristics of a non-volatile memory device.
One example of a potential alternate memory device that promises to exhibit a high level of integration is the phase change memory device. Phase change memory devices work on the basis of the fact that a phase change occurs in a phase change layer interposed between a bottom electrode and a top electrode. One particular phase change of interest comprises a reversible transition between an ordered crystalline phase state and that of an amorphous phase state. This reversible phase transition can be induced by flowing electrical current between the bottom electrode and the top electrode. Accordingly, information, i.e., data storage, can be correlated with the different phase states of the memory cell. One way of recognizing different phase states is to use the difference in the resultant resistance across the two electrodes in which the resistance is dependent upon whether or not the phase change material is in an ordered crystalline phase state and in an amorphous phase state.
One of the most important factors that must be considered in developing phase change memory devices is to reduce the programming current. With this in mind, recently developed phase change memory devices that employ vertical PN diodes as the phase change working components are of interest as cell switching elements instead of NMOS transistor designs. In particular by employing the vertical phase change PN diodes, it is possible to realize a highly integrated phase change memory device because of their simplicity in design and because of the simplicity in electrically driving these devices.
In order to form the vertical PN diodes, in conventional arts, after growing epi-silicon doped with N-type impurities, the P-type impurities are then ion-implanted into the upper end of the grown N-type epi-silicon.
However, these types of conventional vertical PN diodes suffer a problem when highly integrating these devices in that their junction areas between an N-type area and a P-type area become too small which means that their operating currents decrease. Even though the junction area between the N-type area and the P-type area can be increased by simply increasing the size of the N-type epi-silicon, the degree of integration is correspondingly adversely influenced in this case.
Therefore, in order to improve the characteristics of the phase change memory device, it is necessary to increase the junction area between the N-type area and the P-type area of the vertical PN diodes while not adversely influencing the degree of integration.